1. Field of the Invention
This invention relates to information technology (IT), and more particularly, to a computer peripheral connecting interface system configuration debugging method and system which is designed for use in conjunction with a computer platform that is equipped with a particular type of peripheral connecting interface, such as a PCI (Peripheral Component Interconnect) interface, for automatically finding errors in the system configurations of one or more peripheral devices connected to the PCI peripheral connecting interface, and if errors are found, capable of automatically generating an electronic error report for software engineers to more conveniently and efficiently correct the errors in the PCI system configurations.
2. Description of Related Art
PCI (Peripheral Component Interconnect) is a standard peripheral bus architecture that is widely utilized on a computer platform, such as desktop computer, notebook computer, network server, and the like, for connecting the central processing unit of the computer platform externally to various kinds of peripheral devices, such as monitor adapters, RAID (Redundant Array of Independent Disks) adapters, network adapters, to name a few, for the purpose of allowing the central processing unit to exchange data with these peripheral devices.
Since a computer platform is typically installed with multiple peripheral devices, it is an important task in BIOS programming to ensure that each peripheral device's system configuration is set correctly and unconflicted with the system configurations of other peripheral devices. If errors are found in the PCI system configurations, software engineers need to modify related BIOS code to correct the errors in the PCI system configurations.
Presently, a conventional PCI system configuration debugging method is performed manually by test engineers, which includes a first step of visually inspecting the contents of Expansion ROM (Read Only Memory) by the test engineer to check whether each PCI peripheral device's system configuration has been correctly set. If NO, the test engineer then needs to visually inspect the contents of the configuration register and related BIOS code of the faulted PCI peripheral device to find the erroneous settings. When errors are found, the test engineer then manually write an error report and submit the error report to the software development division for software engineers to correct the errors in the PCI system configurations by modifying related BIOS code. Beside this, another drawback in the conventional PCI system configuration debugging method is that when the test engineer inspects the [I/O Memory Base] parameter in the Configuration Register of a PCI-PCI bridge, it requires the test engineer to tediously inspect whether the [I/O Memory Range] parameters are correctly set.
For the above-mentioned reasons, the conventional PCI system configuration debugging method is therefore very tedious, laborious, and time-consuming and thus highly inefficient. Moreover, the visual inspection by test engineers to find errors would easily lead to inaccurate and mistaken results.